Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

Filter

My recent searches
Filter by:
Budget
to
to
to
Type
Skills
Languages
    Job State
    11 jobs found, pricing in USD

    Hello, I need to implement a TCP/IP protocol between a PC and Altera FPGA for one of my project. Please bid if you're an expert and already you have the proven results with you.

    $26 (Avg Bid)
    $26 Avg Bid
    2 bids
    VHDL Firmware Expert needed 6 days left
    VERIFIED

    I've FPGA based ADC/DAC board. Currently I'm looking for an VHDL expert using Altera(intelFPGA) tool. Please share your experience in the proposal. Which FPGA chip did you use before?

    $1006 (Avg Bid)
    $1006 Avg Bid
    16 bids
    optical communication help 5 days left
    VERIFIED

    OPTIWAVE design a Radio-over-Fiber System Analyse your system performance,implement the system in Optiwave and analyse its performance.

    $94 (Avg Bid)
    $94 Avg Bid
    7 bids

    more details will be given in the chat

    $50 (Avg Bid)
    $50 Avg Bid
    2 bids
    Logisim project 3 days left

    In this project you will implement a modified hangman game machine with Logisim. For the game, the minimum requirements are as follows: 1. The word is taken as 64-bit input. 2. Each 8 bit refers to the ascii code of a character. Therefore, the word is 8 characters at most. For instance “hello” is represented as: 00000000 00000000 00000000 01101000 01100101 01101100 01101100 01101111 3....

    $85 (Avg Bid)
    $85 Avg Bid
    5 bids

    I need a creative person in Fuzzy Logic System

    $17 (Avg Bid)
    $17 Avg Bid
    8 bids

    immediately required Verilog and Matlab programmer to solve a problem. I will pay 250/ hour.

    $3 / hr (Avg Bid)
    $3 / hr Avg Bid
    13 bids

    I want to learn how to design a double loop controller mathematically and study the stability for boost converter

    $45 (Avg Bid)
    $45 Avg Bid
    8 bids

    Proficient in System Verilog/UVM/OVM, OOP/C++ • GPU, or Memory System • code coverage and functional coverage driven verification methodology • creating, running and debugging of SystemVerilog/UVM constraint-random Testbench

    $7 / hr (Avg Bid)
    $7 / hr Avg Bid
    12 bids
    Multiplier using System verilog 18 hours left
    VERIFIED

    Multiplier using System verilog

    $14 (Avg Bid)
    $14 Avg Bid
    10 bids