I need a project to be completed. It consists of four tasks involving S-R Latch, S-R Latch with enable, D-Latch, and Positive Edge Triggered D Flip-Flop implemented using VHDL (preferably also using Xilinx ISE Design Suite) and a report accompanying it as well. I am attaching the project guidelines and an example of what I am looking for in the report. The contents of the example report are not related to this project, just the structure of how I would like the report for this project to be constructed.
I need this project completed ASAP. Willing to pay more if done within the next few hours
Thank You
Hello,
I am an electronics engineer having experience in Digital System Design using VHDL/XIlinx for more than 5 years.
Relevant Skills and Experience
VHDL, FPGA
Proposed Milestones
$40 USD - VHDL Code and report
$40 USD in 1 day
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2 freelancers are bidding on average $40 USD for this job
I have well experienced in doing such kind of jobs.................
Relevant Skills and Experience
verilog, vhdl, xilinx
Proposed Milestones
$40 USD - i will do my level best