computer system architecure project

As part of the project, the following should be done: working memory system, command list design, microprogram (microinstruction) project, microprocessor system, consisting of the following elements: bus handling systems: data and address, memory manager chip, instruction download block, control system (controller), data path block. Depending on the number of the drawn task, individual elements of the microprocessor should be modified accordingly. The report should include all the information contained in instruction No. 8 and additional information resulting from the specificity of a given project. In all projects, each microprocessor, after receiving the RESET signal, should start executing the program from memory address 0 after switching to the active state. Additional Assumptions and Limitations: the numeric code to be used in the project is U2, registers, depending on their purpose, should be grouped into blocks, and access to registers must be carried out through the common I/O bus of a given block, the comparator module is named COMP_8B , the multiplier module is called MULT_8B and is available here: [download] , the full adder module is called FULL_ADD_8B and is available here: [download] , microprocessor instructions are to have a variable code length, unless otherwise stated in the task, in all tasks, a separate ALU block should be developed with a default-addressed accumulator register and a bit-addressed marker register unless otherwise stipulated in the restrictions contained in the project specification, it is allowed to use universal registers with certain built-in functionalities, e.g.: built-in increment/decrement, built-in addition/subtraction of the value at the register input from the value stored by this register, built-in the ability to perform logical operations on the contents of the register, etc. Symbols used in the content of the tasks: rej - register (universal, special, segment), nat - immediate value, memory - memory, rej-rej - the command argument should be 2 registers, the result should be stored in the first register, rej-nat - the command's arguments are to be a register and an immediate value, rej-pam - the command's arguments are to be a register and a memory cell addressed in accordance with the addressing modes available in a given task. In the case of operations using segment registers, the code segment register can only be the second operand of the instruction, and the other segment registers can be used as the target register only in data transfer operations. task i want ; Make the design of the microprocessor and associated circuits in accordance with the specifications and limitations presented in the introduction to the manual. In addition, the microprocessor must: be able to address 4096 words of main memory, support addressing: default, immediate, direct, indirect register, support segmentation of memory divided into a program code segment and a data segment, have the appropriate number of segment registers, have an instruction counter register (read only), have 4 universal registers, handle the stack, to execute orders: data transfer rej-nat, rej-rej, rej-pam, adding/subtracting reg-nat, rej-rej, cyclic, arithmetic and logical shifting for reg, mem, comparing rej-rej, rej-nat, rej-pam, calling a subroutine to an address given as a number or register, performing an unconditional jump, performing conditional jumps when greater, smaller, equal, calculation of values ​​of logical functions for rej-rej, rej-memory. The basic word length of the microprocessor is 8 bits. The tag register must be updated after the execution of equivalent commands. The microprocessor command word MUST be of variable length. The word length on the microprocessor data bus is to be 8 bits. A program should be prepared in memory that will demonstrate the capabilities of the microprocessor (the content of the pseudocode together with the content of the assembler should be included in the report).